Date of Degree
MS (Master of Science)
First Committee Member
Frederick N. Skiff
Second Committee Member
Jane M Nachtman
The high resolution silicon Pixel detector is critical in event vertex reconstruction and in particle track reconstruction in the ATLAS detector. During the pixel data taking operation, some modules (Silicon Pixel sensor +Front End Chip+ Module Control Chip (MCC)) go to an auto-disable state, where the Modules don't send the data for storage. Modules become operational again after reconfiguration. The source of the problem is not fully understood. One possible source of the problem is traced to the occurrence of single event upset (SEU) in the MCC. Such a module goes to either a Timeout or Busy state. This report is the study of different types and rates of errors occurring in the Pixel data taking operation. Also, the study includes the error rate dependency on Pixel detector geometry.
ATLAS, DAQ, Errors, Pixels, Radiation, SEU
vii, 34 pages
Includes bibliographical references (pages 33-34).
Copyright 2013 Reddy Pratap Gandrajula